JPEG Hardware Compressor


This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288).

Image resolution is not limited. It takes an RGB input (row-wise) and outputs to a memory the compressed JPEG image. Its quality is comparable to software solutions.

A testbench has been made that takes a bitmap image from your computer and writes a compressed JPEG file by simulating the code. Download the code and try it, it's easy.

The source code is VHDL and it is LGPL, so it can be used in commercial applications as long as the terms of the license are respected.

Anyone interested in the image standards used in this project, they can be downloaded from the following places:

JPEG (ITU-T81 standard):
JFIF (JPEG file headers):
BMP (bitmaps for the testbench):

For any questions email me.



JPEG Hardware Compressor: Detailed Description


Some quick notes until the time I upload the full documentation:

Functional Description

The source code is composed of 9 VHDL files:

JPEG HW Compressor Block Diagram

Output Images

Here are some examples of compressed images outputted by the Compressor.
The compressor has in ROM three different quantization tables which allow it to output images with three different compression/quality levels.

Input image (297 KB uncompressed)

Output Image (39.7 KB Low Compression Q15)

Output Image (19.6 KB Medium Compression Q31=ITU Standard Compression)

Output Image (10.0 KB High Compression Q50)


Here we have two comparisons:

Without subsampling (20.8 KB, as many chroma pixels as luminance pixels)

2:1:1 Subsampling (16.8 KB, for every 4 luminance pixels, only one for red chroma and one for blue chroma)

JPEG Image Outputted by PSP8 (38.2 KB, Q15)

JPEG Image Outputted by JPEG HW Compressor (38.4 KB, Q15)